The Department of Commerce and its Natcast nonprofit have designated Arizona State University (ASU) Research Park as the third location in the U.S. for establishment of a CHIPS for America research and development center.
Aiming to address industry challenges – such as limited 300-millimeter semiconductor wafer prototyping and no shared access to facilities, infrastructure and resources – the new CHIPS for America Advanced Packaging Piloting Facility located in Tempe, Ariz., will focus on semiconductor prototyping and packaging while featuring the world’s first 300mm front-end manufacturing capabilities, the Commerce Department’s Jan. 6 announcement says.
The facility will benefit researchers and industry by supporting diverse R&D activities in a manufacturing-like environment, enabling experiments on novel materials and device architectures. At least one 300mm full-flow complementary metal-oxide-semiconductor technology will operate as a stable baseline for experimentation, Natcast noted.
“A strong research and development ecosystem is essential to ensuring the United States remains at the forefront of semiconductor innovation,” said Commerce Secretary Gina Raimondo in a statement. “Arizona has long been a hub for technological progress, and this new facility will strengthen our domestic supply chain, drive advanced manufacturing breakthroughs, and secure America’s leadership in this critical industry.”
The center will also feature advanced packaging piloting for the development and commercialization of emerging packaging processes, Natcast said, adding that the center will also help train workers by offering hands-on research opportunities.
The partnership is also expected to jumpstart R&D in Arizona’s “robust and growing microelectronic landscape,” contributing to leading front-end semiconductor manufacturing and packaging companies while leveraging related programs at ASU.
While the facility isn’t expected to become operational until 2028, Natcast said it will use ASU’s advanced chips resources – including its 250,000-square-foot MacroTechnology Works featuring a 49,000-square-foot clean room and tools for R&D – until the facility becomes operational. The facility will also include a $270 million R&D and prototype center collaboration with Applied Materials.
The first two flagship CHIPS facilities were announced last fall, both operating under the National Semiconductor Technology Center – which is overseen by Natcast – with the CHIPS for America Design and Collaboration Facility located in California and the second CHIPS for America Extreme Ultraviolet (EUV) Accelerator located in New York and focusing on advancing state-of-the-art EUV technology and R&D.
